Track 3 Early Morning
Machine Learning Assisted Design of Analog Circuits and Systems
Abstract
This tutorial shows how to use Machine Learning (ML) techniques for the optimization and automated design of analog and mixed-signal circuits and systems. A survey of conventional and computational-intelligence design methods and tools is given as a motivation towards using Artificial Neural Networks (ANNs) as optimization engines. A step-by-step procedure is described, explaining the key aspects to consider in Artificial Intelligence (AI) assisted design methodology, including dataset preparation, neural network modeling, training, and optimization of hyperparameters. The presented methodology is general and it can be applied to many different analog circuits and systems, including filters, data converters, transceivers, etc. As an application, the tutorial focuses on two case studies in order to show how to address the design problem at different abstraction levels. The first one is the system-level design (or high-level sizing) of Sigma-Delta Modulators (Σ∆Ms), where ANNs are combined with behavioral simulations and Simulated Annealing to generate an optimum set of building-block (opamp, comparators, etc.) requirements for target specifications. The second example goes down to the circuit-level and automatize the transistor sizing and biasing of basic analog circuits (amplifiers) by combining ANNs with electrical (SPICE-like) simulators. The presented methodology is described in a didactic way, and the contents are organized to learn the fundamentals and practical considerations behind the use of ML techniques for automated design of analog circuits. No prerequisites are needed, and the tutorial contents are organized and addressed for a general audience attending MWSCAS.
Speakers
Gustavo Liñán-Cembrano
Tenured Scientist of the Spanish National Research Council
Instituto de Microelectrónica de Sevilla
Gustavo Liñán-Cembrano is a Tenured Scientist of the Spanish National Research Council at the Instituto de Microelectrónica de Sevilla (IMSE-CNM CSIC-Univ. Sevilla). He received his degree in Physics in 1996, and PhD degree in Microelectronics. His research career focused at the beginning on the design of high-complexity mixed-signal chips for vision, embedding sensing, and processing at the pixel level. For about 10 years he was involved in designing CMOS imagers exhibiting very high dynamic range for industrial applications, including automotive. In recent years he has focused his research on vision processing applications using artificial intelligence, among other techniques, for ecology applications, where he has published in the top journals, including Science, and a software package that is freely distributed with more than 2000 users all over the world. He has authored more than 130 journal and conference papers. He has received the Best Paper Award of the International Journal of Circuit Theory and Applications two times, and recently the Third Best Live Demo Award at ISCAS'2024.
José M. de la Rosa
Director of the Office of International Projects
University of Seville
José M. de la Rosa (Fellow, IEEE) received the M.S. degree in Physics in 1993 and the Ph.D. degree in Microelectronics in 2000, both from the University of Seville, Spain. Since 1993 he has been working at the Institute of Microelectronics of Seville (IMSE), which is its turn part of the Spanish Microelectronics Center (CNM) of the Spanish Council of Scientific Research (CSIC). He does his research at IMSE, where he served as vice-director from February 2018 to March 2023, and he is also a Full Professor at the Dept. of Electronics and Electromagnetism of the University of Seville. Since April 2023, he is the Director of the Office of International Projects of the University of Seville. His main research interests are in the field of analog and mixed-signal integrated circuits, especially high-performance (sigma-delta) data converters, including analysis, behavioral modeling, design and design automation of such circuits. In these topics, Dr. de la Rosa has participated in a number of Spanish and European research and industrial projects, and has co-authored nearly 300 international publications, including journal and conference papers, 11 book chapters and 6 books. He is in the World’s Top 2% Scientists List from Stanford University (editions 2019-2024).
Dr. de la Rosa is an IEEE Fellow and member of the IEEE Circuits and Systems Society (CASS) and the IEEE Solid-State Circuits Society (SSCS). He served as a Distinguished Lecturer of IEEE-CASS (term 2017-2018), and as Chair of the Spain Chapter of IEEE-CASS during the term 2016-2017. He was at the front of the Editorial Board of IEEE Transactions on Circuits and Systems II: Express Briefs, where he served as Deputy Editor-in-Chief since 2016 to 2019, and as Editor-in-Chief (EiC) in the term 2020-2021. He is a member of the TechRxiv Editorial Advisory Board since 2022. He also served as Associate Editor for IEEE Transactions on Circuits and Systems I: Regular Papers, where he received the 2012-2013 Best Associate Editor Award and was Guest Editor for the Special Issue on the Custom Integrated Circuits Conference (CICC) in 2013 and 2014. He served as Guest Editor of the Special Issue of the IEEE J. on Emerging and Selected Topics in Circuits and Systems on Next-Generation Delta-Sigma Converters. He is a member of the Analog Signal Processing Technical Committee of IEEE-CASS and of the Steering Committee of IEEE MWSCAS. He has also been involved in the organizing and technical committees of diverse international conferences, among others IEEE ISCAS, IEEE MWSCAS, IEEE ICECS, IEEE LASCAS, IFIP/IEEE VLSI-SoC, DATE and ESSCIRC. He served as TPC chair of IEEE MWSCAS 2012, IEEE ICECS 2012, IEEE LASCAS 2015 and IEEE ISICAS (2018, 2019). He has been a member of the Executive Committee of the IEEE Spain Section (terms 2014-2015 and 2016-2017), where he served as Membership Development Officer during the term 2016-2017. He is Member-at-Large of the IEEE-CASS Board of Governors (BoG) for the 2023-2025 term and serves as Editor-in-Chief for the IEEE Transactions on Circuits and Systems – I: Regular Papers in 2024-2025.
